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The word abstraction represents every data or address word within a target architecture. That means, in a 32-bit CPU model the word data type will map to a 32-bit value, while in a 64-bit architecture it will map to a 64-bit value.

The word abstraction allows Instruction models to be independent of data word length in a target architecture, since they can deal with parameters of type word. More than that, the word abstraction also implements overloaded operators for read and write operations, so that the appropriate Data Modifiers are applied. These overloaded operators also allow the conversion of word types to regular integer types (e.g. int, unsigned int, uint64_t…). Thus, all ADeLe models can use word types transparently.

IM BeforeAdd (word a, word b) {
  add_dump << static_cast<unsigned int>(a) << " + " << static_cast<unsigned int>(b) << " = ";
}

IM AfterAdd (word r) {
  add_dump << static_cast<unsigned int>(r) << std::endl;
}

In the example above, two Instruction models receive and work with word data types. Word data types are always passed to methods as reference.

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More documentation

1. Introduction to VArchC
2. Installing VArchC
3. The ADeLe Language
   1. ADeLe Design Overview
   2. The ADeLe Description File
   3. Models and Abstractions
      1. The Group Abstraction
      2. The Approximation Abstraction
      3. The Word Abstraction
      4. The Instruction Model
      5. The Energy Model
      6. The Probability Model
      7. The Operating Parameters